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  • info@starvlsi.com
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Current Openings

Position: RTL Design and Verification Trainer

Requirements:

☛ 4+ years of strong hands-on industry experience as RTL Design and Verification Engineer / Trainer.
☛ Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC.
☛ UVM – methodology

Key responsibilities: :

☛ As a senior trainer, you will be responsible for complete course delivery, including assessments and course projects.
☛ Teaching them required technical skill sets in an individual to perform his/her effectively and efficiently.
☛ Develop innovative lab projects as in needed, to adapt industry standard learning experience.
☛ Mentor the students on their technical/soft skills.
☛ Conduct mock interviews.

Location: Marathahalli, Bangalore

Interested folks can Share your resume at
  • info@starvlsi.com

  • Position: DFT Trainer

    Requirements:

    ☛ 4+ years of strong hands-on industry experience as a DFT Engineer / Trainer.
    ☛ Hands on experience with the following areas: Logic Bist, Memory Bist, Boundary Scan, AC JTAG, scan/ATPG design implementation.
    ☛ DFT process/flow development experience.

    Key responsibilities: :

    ☛ As a senior trainer, you will be responsible for complete course delivery, including assessments and course projects.
    ☛ Teaching them required technical skill sets in an individual to perform his/her effectively and efficiently.
    ☛ Develop innovative lab projects as in needed, to adapt industry standard learning experience.
    ☛ Mentor the students on their technical/soft skills.
    ☛ Conduct mock interviews.

    Location: Marathahalli, Bangalore

    Interested folks can Share your resume at
  • info@starvlsi.com

  • Position: Analog Design and Layout Trainer

    Requirements:

    ☛ 4+ years of strong hands-on industry experience as Analog Layout Engineer / Trainer.
    ☛ Hands on experience with the following areas: Logic Bist, Memory Bist, Boundary Scan, AC JTAG, scan/ATPG design implementation.
    ☛ Should be experienced in DMOS, SiGe BCD and CMOS technology in nodes.
    ☛ Experienced in Using Industry leading EDA tools like Cadence, Calibre.
    ☛ Exposure in Perl or Tcl.

    Key responsibilities: :

    ☛ As a senior trainer, you will be responsible for complete course delivery, including assessments and course projects.
    ☛ Teaching them required technical skill sets in an individual to perform his/her effectively and efficiently.
    ☛ Develop innovative lab projects as in needed, to adapt industry standard learning experience.
    ☛ Mentor the students on their technical/soft skills.
    ☛ Conduct mock interviews.

    Location: Marathahalli, Bangalore

    Interested folks can Share your resume at
  • info@starvlsi.com

  • Position: Physical Design and Signoff Trainer

    Requirements:

    ☛ 4+ years of strong hands-on industry experience as a Physical Design Engineer / Trainer.
    ☛ Flow Development and Exposure in Perl or Tcl.
    ☛ Worked on many timing critical shuttle tape outs.
    ☛ Expertise in Cadence/Synopsys flows.

    Key responsibilities: :

    ☛ As a senior trainer, you will be responsible for complete course delivery, including assessments and course projects.
    ☛ Teaching them required technical skill sets in an individual to perform his/her effectively and efficiently.
    ☛ Develop innovative lab projects as in needed, to adapt industry standard learning experience.
    ☛ Mentor the students on their technical/soft skills.
    ☛ Conduct mock interviews.

    Location: Marathahalli, Bangalore

    Interested folks can Share your resume at
  • info@starvlsi.com